We are going through few interesting papers, each pushing the boundaries on short read alignment in its respective domain - namely CPU, GPU and FPGA. The first one is BWA-mem, published (or rather ‘unpublished’) by Heng Li. Various comparisons suggest that it is the state of the art in CPU-based alignment. Non-believers are encouraged to join the food-fight at seqanswers forum. Second one is Ruibang’s SOAP3-dp published in PLOS One last week. Third paper - “Shepard: A Fast Exact Match Short Read Aligner”
- comes from an Iowa state group and claims to be the best in FPGA-based short read alignment. We like to go into the details of all three algorithms provided you tolerate a bit of childish fun with design of a traffic signal light. The original question was posted in our previous commentary -
Adding two binary numbers -
Odd number of NOT gates create oscilattor.
Multiple D-flip flops create ripple counter:
At last, the signal light: